Source down field effect transistors (FETs) are fabricated on a semiconductor substrate wherein the source is located below the substrate. A trench contact or the like lined with a conductor, such as a metal field plate, electrically connects the surface of the substrate to the source located below the substrate. The conductor, if used as a metal field plate, also serves to shield the gate from the drain metal. In some embodiments, the conductor is a layer of titanium nitride, TiN, that coats the top or a substantial portion of the top of the semiconductor and the components fabricated onto the semiconductor.
The conductor covers the gate stacks of the FETs and can be located very close to conductive portions of the gate stacks, which are fabricated on the surface of the semiconductor. In some situations, the conductor is close enough to the conductive portions of the gate stacks to cause shorts between the gates and the conductor, which is coupled to the sources of the FETs. The results are shorts between gates and sources in the FETs, which render the FETs inoperative. As the FETs become smaller, the conductors get close to the gates. The closer proximity of the conductors and gates increases the chances that the conductors will short to the gates.